Cambridge Nanotherm Aims to Change LED Thermal Management

A startup company in the UK aims to change the way engineers think about and design thermal management solutions for high-power LEDs.

Cambridge Nanotherm has been developing a patented process of growing thin films of ceramic (mainly Alumina, Al₂O₃) on metal substrates. We made a brief mention of them here almost exactly a year ago. The ceramic, only 5 μm to 50 μm thick, can support copper circuit traces using the same processes as normal printed circuit board production. This opens the way to very low thermal resistance paths between an LED package and a heat sink, for example. Figure 1 shows the company's depiction of an LED on heat sink design using their technology.

Figure 1. A traditional Aluminum heat sink with a thin ceramic layer used as a PCB substrate, then having a normal PCB copper layer which provides pads to attach the LED chip. Adapted from Cambridge Nanotherm's site.

To their credit, Cambridge Nanotherm was awarded the European Frost and Sullivan Award for Technology Innovation in December of last year. In March the company announced it would invest £500,000 ($843,000) in a large-scale manufacturing plant in Cambridge, UK. Quoted on cabume.com, a site devoted to technology happenings in the Cambridge UK "cluster," Cambridge Nanotherm CEO Pavel Shashkov said, "This new facility is a major next step in the development of our patented technology and of the Cambridge Nanotherm business."

As we often talk about patents here, I did some digging and found this patent, which from the abstract relates to the electro-chemical process of growing the Alumina layer. There appears to be at least one other patent relating to the technology. Time and the market will tell if the IP is broad enough to defend in the highly competitive LED lighting markets.

I spoke with their head of sales to learn more about the goals behind the company's pursuit of this technology. The process is a "wet" process, whereby Aluminum from the heat sink is converted to Alumina in a chemical reaction. Benefits of such a process include the ability to start with an already-fabricated heat sink, and the fact that the resulting layer is part of the resulting structure, so that no additional thermal resistances are present. To look into the second point further, I created the diagrams in Figure 2.

Figure 2 -- click to open a larger version. Schematic pictorial of a single LED package affixed to two different heat-sink arrangements. On the left is the Cambridge Nanotherm solution, where a 10 μm layer of Alumina is grown on top of the heat sink, then copper is added to form circuit traces, and the LED package is SMT soldered directly to the resulting assembly. On the right is a more traditional arrangement, where a thin PCB using a high thermal conductivity epoxy is interfaced to the heat sink using a gap filler material. The high Tc, ~3W/m•K; FR4 is around 0.4 W/ m•K; I used a commercially available specification from Laird for the Tc. For the gap filler I used a standard material with 2.8 W/m•K.

I've left out some components which could affect the performance of such a design, including any spring clips to apply pressure to the design on the right, or screws that would do the same job. What I wanted to derive was a relative heat flux of the two arrangements. The simplest approach was to use thermal resistances for each element of the system, then add them and take the ratio of resistances as an estimate of the ratio of heat flux.

Assumptions

Note that a lot of assumptions are whizzing by here -- somehow I have to get a resistance value for a heat sink, and I'm assuming everything is in series, which might be wrong for some mechanical designs. I've also given the benefit of the doubt to the traditional PCB on heat sink design in that an 80 μm dielectric layer is pretty thin, as well as that 80 um gap filler. On Cambridge Nanotherm's site they arrive at a thermal conductivity of the ceramic as 7 W/m•K while my numbers said 5 W/m•K so I stuck with my more conservative figure. Finally, I'm going to ignore the copper layers; I will leave it as an exercise to convince yourself they don't affect the calculation enough to matter.

Regarding the heat sink, I was lucky to find an article on DigiKey's site about heat sink use for LED cooling. From that article, using a calculated area of the heat sink, and the stated forced air flow of 2m/S, I was able to estimate a thermal resistance of 0.039 cm².K/W.

Doing the math

The equation I will use is Q = (T₁ - T₂₎ / R, where T₁ is the hot end of things, in this case under the LED package, and T₂ would be ambient. What I'm really after Is Q₁/Q₂; note that to get that I don't need to know the temperatures, as long as they are the same in both cases (technically, as long as the difference is the same). This last requirement won't be met, but the estimation will point in the right direction.

The thermal resistances of the traditional assembly are the dielectric of the PCB, the gap filler pad, the heat sink itself, and the resistance representing the transfer of heat to moving air. For the other case, the resistances are the ceramic layer, the heat sink, and the effective resistance at the heat-sink air interface. Both systems have the heat sink resistance and the heat-sink to air term. The resistance of the 10 μm ceramic layer is 0.02 K•cm² / W; this layer is equivalent to the PCB dielectric which has a resistance of 0.13 K•m² / W. You can see that a thinner, more conductive ceramic dielectric is favorable compared to the PCB substrate. The other term the conventional assembly has, and is not present in the Cambridge Nanotherm example, is a 0.9 K•cm² / W resistance due to the gap filler.

Putting in the numbers gives me Q₁ / Q_{2 =} R₂ / R₁ = (0.13 + 0.9 + 0.15 + 0.039) / (0.021 + 0.15 + 0.039). The result is 5.8. Yes, the proposed chip on heat sink design would dramatically increase heat flux. You can see that the major term leading to this result is the gap filler.

Bracketing

Before we get into the issues in my analysis, let me take two detours to help bracket the possible answers. First, I'll toss out the gap filler altogether. Then, Q₁/Q_{2 =} R₂/R₁ = (0.13 + 0.15 + 0.039) / (0.021 + 0.15 + 0.039) = 1.5. In other words, the chip on heat sink system still outperforms the traditional stack by a wide margin. Second, let's imagine a state-of-the-art thermal grease as the gap filler, having a Tc of 5 W/m•K, and that we can squeeze it down to 0.025 cm (0.001 in). The resistance of that term is then reduced to 0.05 cm²•K/W, and the result is 1.75 times the heat flux in favor of the ceramic solution.

Now, some in our community may jump on me for an over-simplified and misleading analysis. The major thing I've left out is that the temperature differences likely would not be the same; i.e. at a constant operating current, the chip-on-heat-sink solution would come to equilibrium at a lower temperature (the company's promotional video claims 20°C cooler), which means I'm overestimating the heat flux ratio.

The real point, though, is that if this approach can be commercially successful, LEDs on such heat sinks will run cooler, all other things being equal. That can allow higher drive current or longer life, or smaller heat sinks, or slower, quieter fans, etc. I am not a luminaire designer, but some here are. What do you think of the Cambridge Nanotherm approach?

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